zamiaCAD is a modular and extensible platform for advanced hardware design, analysis, and research.

Its core components are

  • the language independent instantiation graph (IG) data structure,
  • the language dependent frontends generating an IG, and
  • applications working on the IG data structure.

The frontends consist of a parser and an elaboration engine. Currently, VHDL has a complete frontend, Verilog only has a parser. Applications like a simulator and an eclipse GUI are built on top of the IG and potentially language dependent structures like the abstract syntax tree.

Intended areas of use include

  • design entry
  • design analysis
  • design integration
  • simulation

In these areas zamiaCAD targets the automation of currently manual design and verification tasks. This increases register transfer level design and verification engineer productivity. Currently the complete VHDL standard is supported as hardware description language, but it may be extended by adding other frontends, e.g. for Verilog.

ZamiaCAD screenshot



zamiaCAD consists of three basic building blocks:

Frontend: HDL parsing

  1. full VHDL 2003 parser, syntax tree, elaboration
  2. Verilog 2005 parser and syntax tree, no elaboration yet
  3. persistent and scalable syntax tree storage

Core: Intermediate design representation and analysis

  1. based on a powerful, persistent and scalable design database
  2. fully elaborated design model
  3. full source back-annotation
  4. static analysis (e.g. global signal reference search, fsm recognition)
  5. interpreter for quick expression evaluation
  6. waveform file import modules
  7. built-in simulator for ad-hoc validation

GUI: Eclipse IDE Plugin

  1. graphical viewers and editors
  2. automatic model builder

Frontend and core are over 200k physical source lines of Java code (SLOC), the eclipse plugin is about 20k SLOC.


  • Guenter Bartsch (main developer and project founder)
  • Syed Aoun Raza (contributions to design of ZIL, IG, ZDB and other critical components of zamiaCAD)
  • Anton Chepurov from Tallinn University of Technology
  • Dr. Rainer Dorsch from IBM
  • Dr. Maksim Jenihhin from Tallinn University of Technology
  • Dr. Jaan Raik from Tallinn University of Technology

Theme by Danetsoft and Danang Probo Sayekti inspired by Maksimer